Fitch, Dennis J.; Beltrano, Frank S.; Frigo, Arthur A. (1990, ASQC) AT&T Bell Laboratories, Naperville, IL
Determining the reliability of electronic circuit packs has been hampered by difficulty in collecting field performance data. By developing and supplementing an ongoing field data collection program and incorporating hardware improvements, identified during the resulting reliability analysis, substantial gains in field hardware reliability can be realized. Additionally, customer feedback must be transformed into managerial information that provides input for thoughtful and accurate managerial and engineering decisions and solutions. This paper explains reliability procedures used by AT&T in collecting circuit pack field data, calculating circuit pack Failure-In-Time (FIT) rates, and using Pareto and statistical process control analysis techniques to identify hardware design areas for targeting reliability improvements.