ASQ - Electronics and Communications Division

Soft Error Trends and Mitigation Techniques in Memory Devices

Abstract: 2011 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must first be obtained from the IEEE.

As CMOS process technology scales below 100nm, the amount of charge required to upset a gate or memory cell (Qcrit) is decreasing. Therefore, the probability that an energetic particle can generate enough charge to upset a circuit is increasing. Since these single event upsets do not damage the IC, they are called soft errors. With the proper detection and correction schemes, these particle induced soft errors can be mitigated in a way that does not impact the overall reliability of an electronic system.

Keywords: Failure Rate - Product Reliability - RAMS 2011 Proceedings - Reliability Analysis/Prediction/Estimation - Reliability Model

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